论文总字数：14359字

摘 要

在中国，集成电路已经经过了大约四十余年的发展，并且一个良好的产业基础已经形成了，现在，集成电路已经进入了一个十分快速发展的新的阶段^[1]。稳压器的作用是提供一种不随负载阻抗、输入电压、周围温度和时间的改变而改变的稳定的电源电压^[2] 。低压差稳压器的作用在于使输出电压稳定，因为低压差稳压器能够在电源电压即输入端与负载电压即输出端之间保持微小压差而着称^[2]。现如今，低压差驱动电路在生活生产中的应用也越来越广泛，也十分有发展前景。本课题计划设计LDO来提供提供低噪声输出电平。LDO的性能在很大程度上取决于电源噪声。本次的设计包括参考电压发生器，它提供一个非常稳定的电压与电源电压和温度变化；还有启动电路，目的是加速外部电容器的充电。本论文电路在BLE工艺下实现，版图是虚拟机下利用Cadence Virtuoso工具实现，电路设计和仿真在ADE平台下完成。其中大部分探讨了电路元器件的挑选和设计，在选定参数的情况下使用先进仿真软件对设计的低压差电路进行仿真仿真，得到哥哥输出电压随时间变化的仿真图，并对各个参数进行优化。仿真的最终成果验证了电路的正确性和可行性。

关键词：低压差电路 LDO ADE仿真

Design and Simulation of low dropout circuit LDO of BLE chip

Abstract

In China, integrated circuits have undergone development for more than 40 years, and a good industrial foundation has been formed. Now, integrated circuits have entered a new stage of rapid development [1]. The role of the regulator is to provide a stable supply voltage that does not change with load impedance, input voltage, ambient temperature, and time [2]. The role of the low-dropout regulator is to stabilize the output voltage, because the low-dropout regulator is known to maintain a small voltage difference between the supply voltage, ie the input and the load voltage, ie the output [2]. Nowadays, the application of low-dropout drive circuits in daily life is becoming more and more extensive, and it also has very promising prospects. This project plans to design an LDO to provide low noise output levels. The performance of the LDO depends largely on the power supply noise. This design includes a reference voltage generator that provides a very stable voltage and supply voltage and temperature variation, as well as a startup circuit designed to speed up the charging of external capacitors. The circuit of this thesis is implemented in the BLE process. The layout is implemented by the Cadence Virtuoso tool under the virtual machine. The circuit design and simulation are completed under the ADE platform. Most of them discuss the selection and design of circuit components. Under the condition of selected parameters, advanced simulation software is used to simulate and design the low-dropout circuit of the design, and a simulation diagram of the output voltage of the brother over time is obtained, and various parameters are performed. optimization. The final result of the simulation verified the correctness and feasibility of the circuit.

Keywords: LV differential circuit；LDO；ADE simulation

目录

摘 要 I

Abstract II

第一章 引言 1

1.1课题背景 1

1.2课题内容 2

1.3论文的组织结构 2

1.4本章小结 2

第二章 相关技术介绍 4

2.1 BLE芯片介绍 4

2.2LDO工作原理介绍 5

2.3 LDO稳压器 6

2.4 LDO主要参数 7

2.4.1 压差 7

2.4.2 静态电流 7

2.4.3 精度 7

2.4.4 功耗 7

2.5 ADE平台介绍 7

2.6 本章小结 9

第三章 BLE芯片低压差驱动电路LDO的设计 10

3.1 LDO整体设计 10

3.2 LDO设计变更描述 11

3.2.1 电压基准设计 11

3.3 加快单元设计 15

3.3.1 功能描述 15

3.3.2 实现情况 15

3.3.3 延时设计 16

3.3.4 快速参考电压设计 16

3.4版图设计 18

3.5本章小结 18

第四章 BLE芯片低压差驱动电路的实现与仿真 19

4.1仿真环境 19

4.2仿真结果 19

4.3本章小结 27

第五章 总结与展望 28

5.1 总结 28

5.2 展望 28

参考文献 30

致谢 31

引 言

1.1 课题背景

随着我国集成电路越来越快的发展，生产过程中对性能的要求就越来越高，而LDO低压差线性稳压电路就很好的满足了现在社会生产中对技术的要求：效率高、PCB空间可以十分紧凑、输出调节十分精准、响应快速、成本较低等。

LDO作为线性稳压器中的重要部分，其本身有很多的优点。线性稳压器稳压性好，输出纹波电压小，电路简单，而且比传统的低压差线性稳压器转换率高，所以LDO有着很高的利用价值和研究价值。

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